# Pastebin kugsdJRV

usb_axi_sys = AXILiteInterface(data_width=32, address_width=32)
usb_axi_usb = AXILiteInterface(data_width=32, address_width=32)
self.submodules += AXILiteClockDomainCrossing(
    master  = usb_axi_sys,
    slave   = usb_axi_usb,
    cd_from = "sys",
    cd_to   = "usb"
)
self.bus.add_slave("usb_host", usb_axi_sys, region=SoCRegion(origin=0x81000000, size=0x100000, cached=False))