# Pastebin Z01B8yvV
logic_tile 9 3 {
    lutff_3 {
        out = !in_0 & !in_1 & !in_2 & !in_3
        enable_dff
        out -> local_g0_3 -> lutff_3/in_0
        out -> span12_y3_g14_1
    }
    glb_netwk_3 -> lutff_global/clk
    span4_y3_g12_7 -> local_g0_2 -> lutff_global/cen
}