# Pastebin S8L8lBuM
diff --git a/targets/tinyfpga_bx/base.py b/targets/tinyfpga_bx/base.py
index 43fb191..75b2d4a 100755
--- a/targets/tinyfpga_bx/base.py
+++ b/targets/tinyfpga_bx/base.py
@@ -18,8 +18,8 @@ from targets.utils import csr_map_update
 
 serial =  [
     ("serial", 0,
-        Subsignal("tx", Pins("GPIO:2")),
-        Subsignal("rx", Pins("GPIO:1")),
+        Subsignal("rx", Pins("GPIO:0")),
+        Subsignal("tx", Pins("GPIO:1")),
         IOStandard("LVCMOS33")
     )
 ]