# Pastebin 8hf9olNx apply_directive ('routing', 'sp4_h_l_46', 'sp4_h_r_8') False Possible matches: ['buffer', 'ram/RDATA_12', 'sp4_h_r_8'] ['B9[36]'] ['buffer', 'sp4_h_r_8', 'local_g0_0'] ['B0[14]', '!B1[14]', 'B1[15]', 'B1[16]', 'B1[17]'] ['buffer', 'sp4_h_r_8', 'local_g1_0'] ['B4[14]', '!B5[14]', 'B5[15]', 'B5[16]', 'B5[17]'] ['routing', 'sp4_h_l_37', 'sp4_h_r_8'] ['!B8[12]', 'B9[11]', 'B9[13]'] ['routing', 'sp4_h_l_40', 'sp4_h_r_8'] ['B8[12]', '!B9[11]', 'B9[13]'] ['routing', 'sp4_h_l_45', 'sp4_h_r_8'] ['!B8[12]', 'B9[11]', '!B9[13]'] ['routing', 'sp4_h_l_46', 'sp4_h_r_11'] ['!B12[12]', 'B13[11]', '!B13[13]'] ['routing', 'sp4_h_l_46', 'sp4_h_r_2'] ['B0[12]', '!B1[11]', 'B1[13]'] ['routing', 'sp4_h_l_46', 'sp4_h_r_7'] ['B8[8]', '!B8[9]', 'B8[10]'] ['routing', 'sp4_h_l_46', 'sp4_v_b_11'] ['!B12[11]', 'B12[13]', 'B13[12]'] ['routing', 'sp4_h_l_46', 'sp4_v_b_5'] ['B4[11]', 'B4[13]', 'B5[12]'] ['routing', 'sp4_h_l_46', 'sp4_v_t_41'] ['!B7[8]', '!B7[9]', 'B7[10]'] ['routing', 'sp4_h_l_46', 'sp4_v_t_46'] ['!B14[11]', '!B14[13]', 'B15[12]'] ['routing', 'sp4_h_r_11', 'sp4_h_l_46'] ['!B14[12]', 'B15[11]', '!B15[13]'] ['routing', 'sp4_h_r_3', 'sp4_h_l_46'] ['!B14[12]', 'B15[11]', 'B15[13]'] ['routing', 'sp4_h_r_8', 'sp4_h_l_41'] ['B6[8]', '!B6[9]', 'B6[10]'] ['routing', 'sp4_h_r_8', 'sp4_h_l_45'] ['!B10[12]', 'B11[11]', '!B11[13]'] ['routing', 'sp4_h_r_8', 'sp4_h_l_46'] ['B14[12]', '!B15[11]', 'B15[13]'] ['routing', 'sp4_h_r_8', 'sp4_h_l_46'] ['B14[12]', '!B15[11]', 'B15[13]'] ['routing', 'sp4_h_r_8', 'sp4_v_b_1'] ['!B1[8]', '!B1[9]', 'B1[10]'] ['routing', 'sp4_h_r_8', 'sp4_v_b_8'] ['!B8[11]', '!B8[13]', 'B9[12]'] ['routing', 'sp4_h_r_8', 'sp4_v_t_39'] ['B2[11]', 'B2[13]', 'B3[12]'] ['routing', 'sp4_h_r_8', 'sp4_v_t_45'] ['!B10[11]', 'B10[13]', 'B11[12]'] ['routing', 'sp4_v_b_11', 'sp4_h_l_46'] ['B14[12]', '!B15[11]', '!B15[13]'] ['routing', 'sp4_v_b_2', 'sp4_h_r_8'] ['B8[12]', 'B9[11]', 'B9[13]'] ['routing', 'sp4_v_b_6', 'sp4_h_l_46'] ['!B14[12]', '!B15[11]', 'B15[13]'] ['routing', 'sp4_v_b_8', 'sp4_h_r_8'] ['B8[12]', 'B9[11]', '!B9[13]'] ['routing', 'sp4_v_t_38', 'sp4_h_r_8'] ['!B8[12]', '!B9[11]', 'B9[13]'] ['routing', 'sp4_v_t_40', 'sp4_h_l_46'] ['B14[12]', 'B15[11]', 'B15[13]'] ['routing', 'sp4_v_t_45', 'sp4_h_r_8'] ['B8[12]', '!B9[11]', '!B9[13]'] ['routing', 'sp4_v_t_46', 'sp4_h_l_46'] ['B14[12]', 'B15[11]', '!B15[13]'] Traceback (most recent call last): File "/usr/local/google/home/tansell/work/catx/vtr/env/conda/bin/icebox_hlc2asc", line 1109, in main() File "/usr/local/google/home/tansell/work/catx/vtr/env/conda/bin/icebox_hlc2asc", line 1106, in main main1(args[0]) File "/usr/local/google/home/tansell/work/catx/vtr/env/conda/bin/icebox_hlc2asc", line 1041, in main1 stack[-1].read(fields) File "/usr/local/google/home/tansell/work/catx/vtr/env/conda/bin/icebox_hlc2asc", line 916, in read super().read(fields) File "/usr/local/google/home/tansell/work/catx/vtr/env/conda/bin/icebox_hlc2asc", line 780, in read self.apply_directive('routing', src, dst) File "/usr/local/google/home/tansell/work/catx/vtr/env/conda/bin/icebox_hlc2asc", line 725, in apply_directive raise ParseError("No bit pattern for {} in {}".format(fields, self)) __main__.ParseError: No bit pattern for ('routing', 'sp4_h_l_46', 'sp4_h_r_8') in RAMTTile(1k, 10, 4)