{"body":"$ pe\na8ade547e5d (HEAD -> try-jonas3, kwiboo/rk3399-2025.04-fix-bob-kevin-debug-uart) TEST: rockchip: rk3399: Adjust to match coreboot for bob and kevin\ne99d2863179 rockchip: rk3399: Enable TPL_GPIO for bob and kevin\n0cf50ad5247 Revert \"rockchip: rk3399: Fix TPL build of bob and kevin\"\n1973a377839 Revert \"rockchip: rk3399: Drop unneeded bob and kevin board specific code\"\nc2e00482d00 (us/master, us/WIP/06Feb2025) Merge tag 'xilinx-for-v2025.04-rc2' of https://source.denx.de/u-boot/custodians/u-boot-microblaze\nb3c09eb3652 (us/WIP/05Feb2025, tpm/master) arm64: configs: Remove SYS_BOOTM_LEN for TI devices\n93bcabd9b24 arm: Correct dependency for STATIC_MACH_TYPE\nb16e1db2a07 armv7m: kconfig adds the NVIC option and masks the GIC option when NVIC is selected\ne335f1e3bea Merge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-sh\n0f019056b2d zynqmp: Save \"bootseq\" environment variable in decimal format\n07:10 $ ub-int bob\nBuilding U-Boot in sourcedir for chromebook_bob\nBootstrapping U-Boot from dir /tmp/b/chromebook_bob\nWriting U-Boot using method em100\n                                           \nU-Boot TPL 2025.04-rc1-00145-ga8ade547e5da (Feb 07 2025 - 07:10:38)\nChannel 0: LPDDR3, 933MHz\nBW=32 Col=10 Bk=8 CS0 Row=15 CS1 Row=15 CS=2 Die BW=16 Size=2048MB\nChannel 1: LPDDR3, 933MHz\nBW=32 Col=10 Bk=8 CS0 Row=15 CS1 Row=15 CS=2 Die BW=16 Size=2048MB\n256B stride\nTrying to boot from BOOTROM\nReturning to boot ROM...\n\nU-Boot SPL 2025.04-rc1-00145-ga8ade547e5da (Feb 07 2025 - 07:10:38 -0700)\nBloblist at 100000 not found (err=-2)\nTrying to boot from SPI\n## Checking hash(es) for config config-1 ... OK\n## Checking hash(es) for Image atf-1 ... sha256+ OK\n## Checking hash(es) for Image u-boot ... sha256+ OK\n## Checking hash(es) for Image fdt-1 ... sha256+ OK\n## Checking hash(es) for Image atf-2 ... sha256+ OK\n## Checking hash(es) for Image atf-3 ... sha256+ OK\n## Checking hash(es) for Image atf-4 ... sha256+ OK\nload_simple_fit: Skip load 'atf-5': image size is 0!\nNOTICE:  BL31: v2.8(release):v2.8-896-gc194aa0c6\nNOTICE:  BL31: Built : 17:08:03, May  5 2023\nns16550_serial serial@ff1a0000: pinctrl_select_state_full: uclass_get_device_by_phandle_id: err=-19\n\n\nU-Boot 2025.04-rc1-00145-ga8ade547e5da (Feb 07 2025 - 07:10:38 -0700)\n\nModel: Google Bob\nDRAM:  4 GiB (effective 3.9 GiB)\nCore:  323 devices, 33 uclasses, devicetree: separate\nMMC:   mmc@fe320000: 1, mmc@fe330000: 0\nLoading Environment from MMC... Reading from MMC(0)... *** Warning - bad CRC, using default environment\n\nedp_rockchip dp@ff970000: failed to set rate on clock index 0 (362) (error = -2)\nedp_rockchip dp@ff970000: failed to set rate on clock index 0 (362) (error = -2)\nIn:    serial,cros-ec-keyb\nOut:   serial,vidconsole\nErr:   serial,vidconsole\nModel: Google Bob\nNet:   No ethernet found.\n\nHit any key to stop autoboot:  0 \n=> \n07:10 $ ub-int kevin\nBuilding U-Boot in sourcedir for chromebook_kevin\nBootstrapping U-Boot from dir /tmp/b/chromebook_kevin\nWriting U-Boot using method em100\n                                           \nU-Boot TPL 2025.04-rc1-00145-ga8ade547e5da (Feb 07 2025 - 07:11:04)\nChannel 0: LPDDR3, 933MHz\nBW=32 Col=10 Bk=8 CS0 Row=15 CS1 Row=15 CS=2 Die BW=16 Size=2048MB\nChannel 1: LPDDR3, 933MHz\nBW=32 Col=10 Bk=8 CS0 Row=15 CS1 Row=15 CS=2 Die BW=16 Size=2048MB\n256B stride\nTrying to boot from BOOTROM\nReturning to boot ROM...\n\nU-Boot SPL 2025.04-rc1-00145-ga8ade547e5da (Feb 07 2025 - 07:11:04 -0700)\nBloblist at 100000 not found (err=-2)\nTrying to boot from SPI\n## Checking hash(es) for config config-1 ... OK\n## Checking hash(es) for Image atf-1 ... sha256+ OK\n## Checking hash(es) for Image u-boot ... sha256+ OK\n## Checking hash(es) for Image fdt-1 ... sha256+ OK\n## Checking hash(es) for Image atf-2 ... sha256+ OK\n## Checking hash(es) for Image atf-3 ... sha256+ OK\n## Checking hash(es) for Image atf-4 ... sha256+ OK\nload_simple_fit: Skip load 'atf-5': image size is 0!\nNOTICE:  BL31: v2.8(release):v2.8-896-gc194aa0c6\nNOTICE:  BL31: Built : 17:08:03, May  5 2023\nns16550_serial serial@ff1a0000: pinctrl_select_state_full: uclass_get_device_by_phandle_id: err=-19\n\n\nU-Boot 2025.04-rc1-00145-ga8ade547e5da (Feb 07 2025 - 07:11:04 -0700)\n\nModel: Google Kevin\nDRAM:  4 GiB (effective 3.9 GiB)\nCore:  330 devices, 34 uclasses, devicetree: separate\nMMC:   mmc@fe320000: 1, mmc@fe330000: 0\nLoading Environment from MMC... Reading from MMC(0)... *** Warning - bad CRC, using default environment\n\nedp_rockchip dp@ff970000: failed to set rate on clock index 0 (362) (error = -2)\nedp_rockchip dp@ff970000: failed to set rate on clock index 0 (362) (error = -2)\nIn:    serial,cros-ec-keyb\nOut:   serial,vidconsole\nErr:   serial,vidconsole\nModel: Google Kevin\nNet:   No ethernet found.\n\nHit any key to stop autoboot:  0 \n=> \n\n\n\n$ pe\ne99d2863179 (HEAD) rockchip: rk3399: Enable TPL_GPIO for bob and kevin\n0cf50ad5247 Revert \"rockchip: rk3399: Fix TPL build of bob and kevin\"\n1973a377839 Revert \"rockchip: rk3399: Drop unneeded bob and kevin board specific code\"\nc2e00482d00 (us/master, us/WIP/06Feb2025) Merge tag 'xilinx-for-v2025.04-rc2' of https://source.denx.de/u-boot/custodians/u-boot-microblaze\nb3c09eb3652 (us/WIP/05Feb2025, tpm/master) arm64: configs: Remove SYS_BOOTM_LEN for TI devices\n93bcabd9b24 arm: Correct dependency for STATIC_MACH_TYPE\nb16e1db2a07 armv7m: kconfig adds the NVIC option and masks the GIC option when NVIC is selected\ne335f1e3bea Merge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-sh\n0f019056b2d zynqmp: Save \"bootseq\" environment variable in decimal format\neade90fd005 arm64: zynqmp: Describe images without TF-A\n$ ub-int bob\nBuilding U-Boot in sourcedir for chromebook_bob\nBootstrapping U-Boot from dir /tmp/b/chromebook_bob\nWriting U-Boot using method em100\n                                           \nU-Boot TPL 2025.04-rc1-00144-ge99d28631796 (Feb 07 2025 - 07:09:15)\nChannel 0: LPDDR3, 933MHz\nBW=32 Col=10 Bk=8 CS0 Row=15 CS1 Row=15 CS=2 Die BW=16 Size=2048MB\nChannel 1: LPDDR3, 933MHz\nBW=32 Col=10 Bk=8 CS0 Row=15 CS1 Row=15 CS=2 Die BW=16 Size=2048MB\n256B stride\nTrying to boot from BOOTROM\nReturning to boot ROM...\n\nU-Boot SPL 2025.04-rc1-00144-ge99d28631796 (Feb 07 2025 - 07:09:15 -0700)\nBloblist at 100000 not found (err=-2)\nTrying to boot from SPI\n## Checking hash(es) for config config-1 ... OK\n## Checking hash(es) for Image atf-1 ... sha256+ OK\n## Checking hash(es) for Image u-boot ... sha256+ OK\n## Checking hash(es) for Image fdt-1 ... sha256+ OK\n## Checking hash(es) for Image atf-2 ... sha256+ OK\n## Checking hash(es) for Image atf-3 ... sha256+ OK\n## Checking hash(es) for Image atf-4 ... sha256+ OK\nload_simple_fit: Skip load 'atf-5': image size is 0!\nNOTICE:  BL31: v2.8(release):v2.8-896-gc194aa0c6\nNOTICE:  BL31: Built : 17:08:03, May  5 2023\nns16550_serial serial@ff1a0000: pinctrl_select_state_full: uclass_get_device_by_phandle_id: err=-19\n\n\nU-Boot 2025.04-rc1-00144-ge99d28631796 (Feb 07 2025 - 07:09:15 -0700)\n\nModel: Google Bob\nDRAM:  4 GiB (effective 3.9 GiB)\nCore:  323 devices, 33 uclasses, devicetree: separate\nMMC:   mmc@fe320000: 1, mmc@fe330000: 0\nLoading Environment from MMC... Reading from MMC(0)... *** Warning - bad CRC, using default environment\n\nedp_rockchip dp@ff970000: failed to set rate on clock index 0 (362) (error = -2)\nedp_rockchip dp@ff970000: failed to set rate on clock index 0 (362) (error = -2)\nIn:    serial,cros-ec-keyb\nOut:   serial,vidconsole\nErr:   serial,vidconsole\nModel: Google Bob\nNet:   No ethernet found.\n\nHit any key to stop autoboot:  0 \n=> \n07:07 $ ub-int bob\nBuilding U-Boot in sourcedir for chromebook_bob\nBootstrapping U-Boot from dir /tmp/b/chromebook_bob\nWriting U-Boot using method em100\nTerminal ready...press Ctrl-] twice to exit\n07:08 $ ub-int kevin\nBuilding U-Boot in sourcedir for chromebook_kevin\nBootstrapping U-Boot from dir /tmp/b/chromebook_kevin\nWriting U-Boot using method em100\n                                           \nU-Boot TPL 2025.04-rc1-00144-ge99d28631796 (Feb 07 2025 - 07:08:37)\nChannel 0: LPDDR3, 933MHz\nBW=32 Col=10 Bk=8 CS0 Row=15 CS1 Row=15 CS=2 Die BW=16 Size=2048MB\nChannel 1: LPDDR3, 933MHz\nBW=32 Col=10 Bk=8 CS0 Row=15 CS1 Row=15 CS=2 Die BW=16 Size=2048MB\n256B stride\nTrying to boot from BOOTROM\nReturning to boot ROM...\n\nU-Boot SPL 2025.04-rc1-00144-ge99d28631796 (Feb 07 2025 - 07:08:37 -0700)\nBloblist at 100000 not found (err=-2)\nTrying to boot from SPI\n## Checking hash(es) for config config-1 ... OK\n## Checking hash(es) for Image atf-1 ... sha256+ OK\n## Checking hash(es) for Image u-boot ... sha256+ OK\n## Checking hash(es) for Image fdt-1 ... sha256+ OK\n## Checking hash(es) for Image atf-2 ... sha256+ OK\n## Checking hash(es) for Image atf-3 ... sha256+ OK\n## Checking hash(es) for Image atf-4 ... sha256+ OK\nload_simple_fit: Skip load 'atf-5': image size is 0!\nNOTICE:  BL31: v2.8(release):v2.8-896-gc194aa0c6\nNOTICE:  BL31: Built : 17:08:03, May  5 2023\nns16550_serial serial@ff1a0000: pinctrl_select_state_full: uclass_get_device_by_phandle_id: err=-19\n\n\nU-Boot 2025.04-rc1-00144-ge99d28631796 (Feb 07 2025 - 07:08:37 -0700)\n\nModel: Google Kevin\nDRAM:  4 GiB (effective 3.9 GiB)\nCore:  330 devices, 34 uclasses, devicetree: separate\nMMC:   mmc@fe320000: 1, mmc@fe330000: 0\nLoading Environment from MMC... Reading from MMC(0)... *** Warning - bad CRC, using default environment\n\nedp_rockchip dp@ff970000: failed to set rate on clock index 0 (362) (error = -2)\nedp_rockchip dp@ff970000: failed to set rate on clock index 0 (362) (error = -2)\nIn:    serial,cros-ec-keyb\nOut:   serial,vidconsole\nErr:   serial,vidconsole\nModel: Google Kevin\nNet:   No ethernet found.\n\nHit any key to stop autoboot:  0 \n=> \n","name":"","extension":"txt","url":"https://www.irccloud.com/pastebin/tYAxuilC","modified":1738937554,"id":"tYAxuilC","size":9601,"lines":222,"own_paste":false,"theme":"","date":1738937554}